The present disclosure relates to a semiconductor device, and more particularly, relates to a memory device sampling data using a control signal transmitted through a through silicon via (TSV).
A plurality of memory dies may be stacked to increase the degree of integration of a memory device. A memory device with three-dimensional structure may store and process a large amount of data. For forming the three-dimensional structure, various packaging technologies may be applied to semiconductor dies. In particular, since a through silicon via (TSV) is appropriate for miniaturization and high speed of the memory device, the through silicon via may be used to stack semiconductor dies.
Time points at which signals are output from stacked memory dies may vary due to process, voltage, and temperature variations of the memory dies. The difference between the output time points may make it difficult for the memory device to operate at a high speed. Also, in the case where a circuit of compensating for the output time points is positioned on a buffer die where memory dies are stacked, the area of the buffer die may increase.